Estoy codificando en vhdl y quiero tener todos mis códigos en un solo archivo. Aquí está el código que tengo en un archivo (sumador completo y medio sumador):
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use work.Single_Bit_Half_Adder;
entity Single_Bit_Full_Adder is
Port (
A :in STD_LOGIC;
B :in STD_LOGIC;
Cin :in STD_LOGIC;
Sum :out STD_LOGIC;
Cout :out STD_LOGIC
);
end Single_Bit_Full_Adder;
architecture Behavioral of Single_Bit_Full_Adder is
component Single_Bit_Half_Adder is
Port (
A :in STD_LOGIC;
B :in STD_LOGIC;
Sum :out STD_LOGIC;
Cout :out STD_LOGIC
);
end component;
signal tempSum, tempCoutHA1, tempCoutHA2: STD_LOGIC;
begin
Half_Adder1: Single_Bit_Half_Adder port map (A => A, B => B, Sum => tempSum, Cout => tempCoutHA1);
Half_Adder2: Single_Bit_Half_Adder port map (A => tempSum, B => Cin, Sum => Sum, Cout => tempCoutHA2);
Cout <= tempCoutHA1 or tempCoutHA2;
end Behavioral;
------------------------------
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
entity Single_Bit_Half_Adder is
Port (
A :in STD_LOGIC;
B :in STD_LOGIC;
Sum :out STD_LOGIC;
Cout :out STD_LOGIC
);
end Single_Bit_Half_Adder;
architecture Behavioral of Single_Bit_Half_Adder is
begin
Sum <= A xor B;
Cout <= A and B;
end Behavioral;
Pero estoy recibiendo un error en "use work.Single_Bit_Half_Adder;" diciendo que single_bit_half_adder no está en la biblioteca.
¿Qué debo hacer para resolver este problema?