Módulo Wiznet Wiz820io (W5200) - No hay datos en la línea MISO

Tuve un circuito de trabajo con Wiznet W5100, pero para obtener un mejor rendimiento cambié a Wiznet W5200 (en el módulo Wiz820io). Esto implicó volver a cablear los pines, cambiar la dirección de registro y también el código de Lectura / Escritura para el módulo Ethernet, ya que este chip admite la Escritura en Ráfaga.

Hoja de datos aquí

Sin embargo (esto me tiene totalmente perplejo), cuando enciendo el circuito y leo los registros que acabo de escribir (GATEWAY, IP, etc.), todo lo que obtengo es 0x00.

Esto es lo que obtuve usando el analizador lógico

LalíneaMISOessimplementeplana.Noseestánenviandodatosalmaestro.

Estassonmisrutinasdelectura/escrituraparaelmóduloEthernet:

//OPCODES(TOBEOR'EDWITHUPPER7BITSOFADDRESS)#defineW5200_WRITE0x80#defineW5200_READ0x00//BURSTWRITINGFORW5200.FORDATALENGTH=1,DEFAULTSTOBYTEWRITEvoidETHERNET_WRITE(uint16_taddress,uint8_t*data,uint16_tlen){W5200_SS_LOW;//SETW5200SSLOWSPI_TXRX((address&0xFF00)>>8);//WRITEHIGHBYTEOF2BYTEADDRESSwhile(SPI_DATA_RECEIVED==0);SPI_TXRX((address&0x00FF));//WRITELOWBYTEOF2BYTEADDRESSwhile(SPI_DATA_RECEIVED==0);SPI_TXRX(W5200_WRITE|((len&0x7F00)>>8));//WRITEOPCODE|DATALENGTH(UPPER7BITS)while(SPI_DATA_RECEIVED==0);SPI_TXRX(len&0x00FF);//DATALENGTH(LOWER8BITS)while(SPI_DATA_RECEIVED==0);for(uint16_ti=0;i<len;i++){SPI_TXRX(data[i]);//WRITEDATAwhile(SPI_DATA_RECEIVED==0);}W5200_SS_HIGH;//TURNBACKSSHIGH}//BURSTREADINGFORW5200.FORDATALENGTH=1,DEFAULTSTOBYTEREADvoidETHERNET_READ(uint16_taddress,uint8_tlen,uint8_t*retval){W5200_SS_LOW;//SETW5200SSLOWSPI_TXRX((address&0xFF00)>>8);//WRITEHIGHBYTEOF2BYTEADDRESSwhile(SPI_DATA_RECEIVED==0);SPI_TXRX(address&0x00FF);//WRITELOWBYTEOF2BYTEADDRESSwhile(SPI_DATA_RECEIVED==0);SPI_TXRX(W5200_READ|((len&0x7F00)>>8));//READOPCODE|DATALENGTH(UPPER7BITS)while(SPI_DATA_RECEIVED==0);SPI_TXRX(len&0x00FF);//DATALENGTH(LOWER8BITS)while(SPI_DATA_RECEIVED==0);for(uint8_ti=0;i<len;i++){SPI_TXRX(0x00);//WRITEDUMMYDATATOREADDATAwhile(SPI_DATA_RECEIVED==0);retval[i]=SPI_RX_DATA;}W5200_SS_HIGH;//SETSSHIGH}

Inicialmente,estabaalimentandoestemóduloconLM295033,perocomosusalidadecorrientemáximaesde100mA,paséaLM317LDOajustablequeahoraalimentaelmódulocon3.14V

EsteesmicódigodeintializacióndeEthernet

voidETHERNET_INIT(uint16_tip_address,uint16_tsubnet_address,uint16_tgateway_address,uint16_tmac){uint8_tval[6];uint8_tretval[6];uint8_ti;W5200_RESET_LOW;_delay_us(50);W5200_RESET_HIGH;for(i=0;i<20;i++){_delay_ms(20);}val[0]=MR_RST;ETHERNET_WRITE(MR,val,1);ETHERNET_READ(MR,1,retval);while(retval[0]!=0){ETHERNET_READ(MR,1,retval);}printf("*** Ethernet ****\r");

    //if(ETHERNET_DEBUG)
    //{
        ETHERNET_READ(MR, 1, retval);
        printf("Reading MR : %u\r", retval[0]); 
    //}

    //set IP Address
    EEPROM_READ(ip_address, 4, retval);
    ETHERNET_WRITE(SIPR, retval, 4);
    //if(ETHERNET_DEBUG)
    //{
        ETHERNET_READ(SIPR, 4, retval);
        printf("IP Address : %u.%u.%u.%u\r",retval[0],retval[1],retval[2],retval[3]);

    //}

    //set subnet mask
    EEPROM_READ(subnet_address, 4, retval);
    ETHERNET_WRITE(SUBR, retval, 4);
    //if(ETHERNET_DEBUG)
    //{
        ETHERNET_READ(SUBR, 4, retval);
        printf("Subnet Mask : %u.%u.%u.%u\r",retval[0],retval[1],retval[2],retval[3]);
    //}

    //set gateway address
    EEPROM_READ(gateway_address, 4, retval);
    ETHERNET_WRITE(GWR, retval, 4);
    //if(ETHERNET_DEBUG)
    //{
        ETHERNET_READ(GWR, 4, retval);
        printf("Gateway ip Address : %u.%u.%u.%u\r",retval[0],retval[1],retval[2],retval[3]);
    //}

    //set mac address
    EEPROM_READ(mac, 6, retval);
    ETHERNET_WRITE(SHAR, retval, 6);
    //if(ETHERNET_DEBUG)
    //{
        ETHERNET_READ(SHAR, 6, retval);
        printf("mac Address : %02X.%02X.%02X.%02X.%02X.%02X\r",retval[0],retval[1],retval[2],retval[3],retval[4],retval[5]);
    //}

    //set interrupt high time
    val[0] = 1;
    ETHERNET_WRITE(INTLEVEL, val, 1);

    //set TX and RX memory to 2KB per socket
    //val[0] = 0x55;
    //ETHERNET_WRITE(RMSR, val, 1);
    //ETHERNET_WRITE(TMSR, val, 1);

    //set TX = 8Kb RX = 8Kb for Sock 0 & Sock 1
    val[0] = 0x08;
    ETHERNET_WRITE(SOCKET_0_REGISTER_BASE + SN_RX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_0_REGISTER_BASE + SN_TX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_1_REGISTER_BASE + SN_RX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_1_REGISTER_BASE + SN_TX_MEMSIZE, val, 1);
    val[0] = 0x00;
    ETHERNET_WRITE(SOCKET_2_REGISTER_BASE + SN_RX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_2_REGISTER_BASE + SN_TX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_3_REGISTER_BASE + SN_RX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_3_REGISTER_BASE + SN_TX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_4_REGISTER_BASE + SN_RX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_4_REGISTER_BASE + SN_TX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_5_REGISTER_BASE + SN_RX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_5_REGISTER_BASE + SN_TX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_6_REGISTER_BASE + SN_RX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_6_REGISTER_BASE + SN_TX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_7_REGISTER_BASE + SN_RX_MEMSIZE, val, 1);
    ETHERNET_WRITE(SOCKET_7_REGISTER_BASE + SN_TX_MEMSIZE, val, 1);


    //set RTR - retry time value register for timeout @ 2000us
    val[0] = 0x07;
    val[1] = 0xD0;
    ETHERNET_WRITE(RTR, val, 2);
    //if(ETHERNET_DEBUG)
    //{
        ETHERNET_READ(RTR, 2, retval);
        printf("rtr : %x:%x\r", retval[0], retval[1]);
    //}

    //set RCR - max retry count to 8
    val[0] = 0x08;
    ETHERNET_WRITE(RCR, val, 1);
    //if(ETHERNET_DEBUG)
    //{
        ETHERNET_READ(RCR, 1, retval);
        printf("rcr : %u\r", retval[0]);
    //}

    //enable mask for socket 1 interrupt
    val[0] = IMR_S1_INT;
    ETHERNET_WRITE(IMR, val, 1);
    if(ETHERNET_DEBUG)
    {
        ETHERNET_READ(IMR, 1, retval);
        printf("IMR : 0x%x\r",retval[0]);
    }
}

¿Alguna idea?