Quiero hacer un banco de pruebas para mi mux21 pero no puedo encontrar una manera, y en línea no hay nada claro, aquí está mi código.
library IEEE;
use ieee.std_logic_1164.all;
entity mux21 is
port( a,b,sel: in std_logic;
s: out std_logic);
end mux21;
architecture arch_mux21 of mux21 is
begin
with sel select s<=
a when '0',
b when '1',
'0' when others;
end arch_mux21;
library IEEE;
use ieee.std_logic_1164.all;
entity mux_21_TB is
end mux_21_TB;
architecture tb_arch of mux_21_TB is
signal tb_a : std_logic:= '0';
signal tb_b : std_logic:= '0';
signal tb_sel : std_logic:= '0';
signal tb_s : std_logic:= '0';
begin
UUT : entity work.mux21
port map (
a => tb_a,
b => tb_b,
sel => tb_sel,
s => tb_s
);
process
begin
tb_a <= '1';
tb_b <= '0';
tb_sel <= '1';
wait for 10ns;
tb_sel <= '0';
wait for 20ns;
tb_a <= '0';
tb_b <= '1';
wait for 10ns;
tb_sel <= '1';
wait;
end process;
end tb_arch;
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