Soy nuevo en VHDL y estoy siguiendo un tutorial de YouTube para aprender VHDL. El instructor escribió este código y parece que funciona con él, pero conmigo no funciona.
library IEEE;
use IEEE.STD_LOGIC_1164.all;
entity gates is port (
a : in STD_LOGIC ;
b : in STD_LOGIC ;
z : out STD_LOGIC_VECTOR(5 downto 0)
);
end gates;
architecture arch of gates is
begin
z(5) <= a and b;
z(4) <= a nand b;
z(3) <= a or b;
z(2) <= a nor b;
z(1) <= a xor b;
z(0) <= a xnor b;
end arch;
Cuando intento compilarlo, aparece este mensaje de error
gvhdl: FreeHDL root path is '/usr'.
gvhdl: executing '/usr/bin/freehdl-v2cc -m Desktop/vhdl/new._main_.cc -L /usr/share/freehdl/lib -o Desktop/vhdl/new.cc Desktop/vhdl/new.vhdl'
Desktop/vhdl/new.vhdl: in gates(imple):
Desktop/vhdl/new.vhdl:18: no declaration matches use as "xnor"(std_logic, std_logic), candidates are
/usr/share/freehdl/lib/std/standard.vhdl:5: "xnor"(BOOLEAN,BOOLEAN) return BOOLEAN (invalid 0)
/usr/share/freehdl/lib/std/standard.vhdl:6: "xnor"(BIT,BIT) return BIT (invalid 0)
/usr/share/freehdl/lib/std/standard.vhdl:69: "xnor"(BIT_VECTOR,BIT_VECTOR) return BIT_VECTOR (invalid 0)
v2cc: Desktop/vhdl/new.vhdl: 1 errors
gvhdl: Compilation failed!
Died at /usr/bin/gvhdl line 211.
Estoy usando freehdl