Tengo > 20 tipos diferentes de MOSFET de fairchild que me gustaría agregar al árbol modelo de LTSpice. Fairchild encripta sus bibliotecas. ¿Qué es un método sencillo de agregar sus bibliotecas al árbol modelo donde no tengo que especificar un subcircuito cada vez que quiera usarlas? Tengo cientos de estos FET y los uso con frecuencia.
EDIT
Supongo que esto puede arrojar algo de luz sobre el tema.
* LTspice Encrypted File
*
* This encrypted file has been supplied by a 3rd
* party vendor that does not wish to publicize
* the technology used to implement this library.
*
* Permission is granted to use this file for
* simulations but not to reverse engineer its
* contents.
*
********************************************************************************
* Fairchild Semiconductor SuperFETIII 650V Model Library
* Last Update: Jun. 02, 2016
* Model Version: 1.3
* Simulator: LTspice
*
********************************************************************************
* Model Contacts:
* James Victory [email protected]
* Ken He [email protected]
* Scott Pearson [email protected]
* Hyeongwoo Jang [email protected]
*
********************************************************************************
* Reversion History:
* Vers. Date Brief Description
* 1.0 03/16/2016 1. Extract scalable base model from data of FCB070N65S3. The process parameters are from
* rev2 TCAD simulation (file "SJFET3_650V_TCAD_MODEL_PARAMETER_TABLE_rev2.xlsx")
* 2. Generated models for :
* FCB070N65S3
* FCP067N65S3
* FCPF067N65S3
* 1.1 05/03/2016 Added model for FCH023N65S3_F155
* 1.2 05/25/2016 Added model for FCH067N65S3_F155
* 1.3 06/02/2016 Added model for FCH023N65S3L4
* Updated thermal parameters for FCH023N65S3_F155
*
********************************************************************************
* Usage:
* This library contains 3 and 5 pin(or terminal) models. The models include
* self heating effects and were characterized under pulse conditions from
* 10us to 1ms conditions.
*
* The 5p models contain 2 additional pins tj (or junction temperature) and
* tcase (or device case thermal terminal).
* tj should always be left floating or can be connected to a very
* large resistor (>1meg). This terminal is meant to provide the user with
* output information on the junction temperature under operation. For model
* verification purposes against the data sheet and isothermal device simulations
* for example, tcase should be connected to a voltage source with value {TEMP},
* the simulator ambient temperature. For system/module level simulations that
* include thermal effects, tcase should be connected to the device-module
* thermal interface node such as the heat sink interface point.
*
* For the device FCH023N65S3L4 which has a Kelvin Source (4-lead package), there are 4- and 6-pin models, the 3rd pin
* "s1" is the Kelvin Source, the 4th pin "s2" is the Power Source.
*
********************************************************************************
* Support devices:
* FCB070N65S3_3p, FCB070N65S3_5p
* FCP067N65S3_3p, FCP067N65S3_5p
* FCPF067N65S3_3p, FCPF067N65S3_5p
* FCH023N65S3_F155_3p, FCH023N65S3_F155_5p
* FCH067N65S3_F155_3p, FCH067N65S3_F155_5p
* FCH023N65S3L4_4p, FCH023N65S3L4_6p
*
********************************************************************************
*
** Begin:
90 3B 2A 85 D1 AC 5A AE 43 66 6B A8 56 8C 9F F4
03 E8 4D E9 30 FE 57 15 09 76 CA DC 5D 13 36 1F
91 60 74 AB 47 45 20 03 46 D7 13 E8 66 1A 13 CF
94 22 5C 5A 9C 1F 27 A1 4C 65 63 59 EF FC 09 07
Ni siquiera puedo conseguir que el ltspice los reconozca. Fairchild no proporciona instrucciones sobre cómo usarlas y en LT, todo lo que pude encontrar fue encriptar el tuyo. Intenté usarlos como bibliotecas no encriptadas. Lo loco es que un tipo tenía una biblioteca de chips de controladores que descargué de un foro y todo lo que tuve que hacer fue copiarlo y pegarlo en la carpeta y puedo arrastrarlo y soltarlo sin sudar. Estoy diseñando un SMPS con un SG3525 y funciona muy bien en especias. ¿Por qué es esto un dolor de cabeza?
